PSD
Dr.
Engel is collaborating with researchers in the Department of Chemistry at
The
project was (Sept. 1, 2006 – Feb. 28, 2009) originally funded by the National
Science Foundation (NSF Grant #0618996).
Funding for the two-year period was $192,754.
The
project is currently funded (March 1, 2009 – February 28, 2011) by Los Alamos
National Laboratory (LANL).
NSF proposal (pdf)
Annual report
(2007) to NSF reporting progress on project.
Annual report
(2008) to NSF reporting progress on project.
Final report to NSF (May 2009).
Rev. 2.0 of our PSD chip will be submitted to the May 24 MOSIS AMIS C5N
run.
A few
performance issues identified with the Rev 1.0 chips were addressed.
Here is a report describing
changes that were made in Rev. 2.0 along with some plots predicting performance
improvements.
Complete
set of schematics for PSD (Rev 2.0)
chip.
Complete
set of schematics for PSD (Rev 1.0)
chip.
Thesis by Justin Proctor
describing PSD8C design (Dec. 2007)
Thesis by Michael Hall predicting
PSD8C performance (Dec. 2007)
Thesis by Dinesh Dasari
describing the design of an on-chip ADC (Aug. 2008)
Thesis by Nagendra
Valluru describing RAM buffer for on on-chip ADC
(Aug. 2008)
Thesis by Nam Nguyen describing I2C
interface (Dec. 2008)
Thesis by Naga Yelchuri
describing the control logic for an on-chip ADC (Dec. 2009)
Progress report (Oct. 20, 2006)
Presentation made by Michael Hall at
CSUI conference (Nov. 2, 2007)
Presentation made by James Brown at
Argonne Undergraduate Symposium (Nov. 2, 2007)
Presentation
describing our modeling of PSD chip
and predicted performance
Document
describing our attempt to optimize
integration intervals
Presentation by Mike Hall at SIUE
Graduation Symposium (April 2007)
Poster presented by Justin Proctor at SIUE
Graduation Symposium (April 2007)
MATLAB code (zip archive)
MathCAD worksheets (zip
archive)